Wristband displays have settled on 240×240 RGB565 color panels, and one frame is 115KB. Smooth sliding needs two frames held in memory for double buffering; fast watch-face switching needs several background images stored in advance; after the screen goes dark, that data must stay in place instead of being reloaded at every wake-up. All three jobs land on one memory chip, and the wristband gives it very little: the whole-device dark-state budget is only tens of μA, and the main board is about the size of a fingernail. The advantage of APS1604M-SQR-ZR in a wristband is bringing power down first, with capacity and package leaving margin as well.
The dark state covers more than ninety percent of a wristband's day, and the frame buffer cannot lose power then, because the watch-face backgrounds and animation frames live in it. APS1604M-SQR-ZR draws typically 20μA in standby (25°C); even at the 100μA maximum for 85°C, the impact on a 200mAh battery over seven days stays within twenty minutes. Across the whole device, the seven-day average current is 1.19mA, and the standby cache accounts for about 1.7 percent of it. Once in standby, the internal array of APS1604M-SQR-ZR holds its data by itself and refresh is handled inside the chip, with no firmware involvement. For a wristband engineer working on low power, display memory becomes a line item that goes straight into the power budget, without reserving a large uncontrolled margin.
The VDD range of 1.62~1.98V sits on the same power rail as the MCU's low-power core and the display. The battery feeds it through a DC-DC with no LDO in between. What you save is more than one component: every extra power stage adds another static leakage path, and on a wristband whose dark-state budget is counted in μA, that detail often decides which battery-life tier you land in. The board also drops two passive parts and a small patch of layout area — real margin on a wristband board where area is tight.
16Mb equals 2MB. Two frames of double buffering take only 230KB, or 11 percent. The rest holds three to five watch-face backgrounds, icon assets and intermediate frames for transition animations. When the user switches watch faces, the switch happens straight out of frame memory, the face appears as soon as the wrist is raised, and there is no 200ms re-decode from external storage. With only a few hundred KB left, you could keep one face, and every switch would wait on an external storage read, showing a blank before the image. On capacity, APS1604M-SQR-ZR leaves the wristband UI room to animate.
Wrapped Burst reads reach 144MHz; on a four-line QSPI interface that is 72MB/s of theoretical bandwidth, while refreshing one screen at 30fps needs only 3.45MB/s, leaving plenty for animation. The read pattern also fits the panel: wrap lengths of 16/32/64/512 are register-configurable, which is friendly to line-based LCD fetches. Linear 512-byte bursts reach 84MHz and suit block moves of watch-face images, with cross-page access allowed — as long as the tCEM limit is respected, transfers do not need to be cut on 512-byte boundaries. Output drive strength is programmable at 50/100/200Ω; when traces run a bit long, one step of stronger drive brings signal quality back and saves a rework round during debugging. The chip also supports software reset: after a fault, the MCU pulls it back to its initial state with one command instead of cutting the power rail and repowering. A wristband is sealed with a built-in battery and cannot be reset by disconnecting power in the field, so software reset adds one more recovery path.
The USON-8 package measures only 3×2mm and fits on the free area behind the MCU; route the four QSPI data lines matched in length and side by side, with spacing kept between clock and data lines. Wristband boards are usually four-layer, 0.8mm thick, with low thermal mass and a wide reflow window. For projects that dispense glue for water resistance, watch the glue volume and creepage clearance around the bottom pads during pilot runs.
PSRAM is memory, and you can write it as many times as you like with no erase-cycle limit. Watch-face switching, animation refresh and temporary sensor buffers are all fair game. In a NOR-based frame-store design, all of that counts against a 100,000-cycle endurance budget; a user who changes watch faces often can burn through a noticeable share in a year, and the firmware has to add wear leveling on top. Endurance often takes one line in a selection table, but it decides whether the firmware needs extra wear-leveling work for that region.
Now suppose you skip PSRAM. Chunked rendering into MCU SRAM saves the part, but SRAM is still needed for algorithms, so the line buffer gets shallow, 30fps sliding starts to show banding, and animation quality drops a tier. External DDR has bandwidth to spare but doubles cost, needs its own power and termination design, and will not fit a wristband board. Both alternatives have clear weaknesses; the 1.8V 16Mb PSRAM is the option with no trade-off: enough capacity, one rail, standby within budget.
| Item | Value |
|---|---|
| Ordering part number | APS1604M-SQR-ZR |
| Density / organization | 16Mb, 2M×8bit |
| Interface frequency | 144MHz Wrapped Burst / 84MHz linear burst |
| Supply voltage | 1.62~1.98V |
| Standby current | typ. 20μA @25°C, max. 100μA @85°C |
| Operating temperature | -40~+85°C (standard) |
| Package | USON-8 3×2mm |
First, dark-state current: run one night with the standby command commented out and one night with it enabled; the difference between the two whole-device currents is its true share. Second, sliding frame rate: use the panel's TE signal or a frame counter to confirm that double buffering is rotating. Third, cold-temperature power-up: the ZR grade is rated to -40~85°C, so the chip itself is fine; what needs confirming outdoors on a winter sleeve is the power-up ramp after battery internal resistance rises. Make the firmware's power-ready check solid, and record the ambient temperature during testing so it can be reconciled with room-temperature data. Once these three pass, APS1604M-SQR-ZR can be locked into the BOM with confidence.
Q: Can APS1604M-SQR-ZR be used directly in a 3.3V system?A: No. VDD is only 1.62~1.98V; on platforms with 3.3V MCU IO you must handle level shifting first, or pick a part supplied at 3.3V.
Q: How many watch faces actually fit in 16Mb?A: One 240×240 RGB565 frame is 115KB, double buffering takes 230KB, and about 1.7MB remains. At 200~300KB per watch-face background, that is three to five faces, depending on the compression method.
Q: Can PSRAM replace NOR for program storage?A: No. PSRAM does not retain data when power is removed; programs belong in non-volatile storage such as NOR, and its role is frame buffers and temporary data. Designs that need both usually pair NOR with PSRAM.
Q: Is the 20μA standby current a typical value or a maximum?A: The datasheet gives both. 20μA typical at 25°C, 100μA maximum at 85°C and 150μA maximum at 105°C. Build the power budget on the maximum for the relevant temperature.
Q: How do I choose between the USON and SOP packages?A: ZR is USON-8 3×2mm for narrow wristband boards; SN is SOP-8 150mil with protruding leads, which is easier for prototyping and hand-solder verification.
As an authorized distributor of AP Memory, Shenzhen Manduic Technology Co., Ltd. can supply samples, volume quantities and the complete datasheet of APS1604M-SQR-ZR, and provides hands-on technical support on capacity allocation, power budgeting and package suffix selection across the SQR series.
For samples, product datasheets, detailed adaptation solutions or technical support, please contact us:
Tel: +86-150-1290-5940
Email: sales@manduic.com
Website: www.manduic.com
Telephone: +86-150-1290-5940
Mobile phone: +86-150-1290-5940
Mailbox: sales@manduic.com
Address: Room 1115, R&D Building, DAFU Technology, Fenghuang Sub‑district, Guangming District, Shenzhen City